20220218, 04:50  #23 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
dept of corrections

20220224, 10:22  #25 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
Reservation 3321928307 solo both P1 stages
Running on ostrich in Ubuntu/WSL/Win10 for now, so some other prime95/Win10 work can run to completion in parallel there. May run various configurations along the way to benchmark alternatives while making useful progress on the exponent. Stage 2 will be split to multiple instances or systems or both. A previous start gave
Code:
Using complex FFT radices 768 16 16 16 32 [20211209 02:06:42] M3321928307 S1 bit = 10000 [ 0.04% complete] clocks = 02:08:02.283 [768.2284 msec/iter] Res64: EB3C4D3B62864647. AvgMaxErr = 0.143355255. MaxErr = 0.187500000. Residue shift count = 0. INFO: Successfully read precomputed/bitreversed Stage 1 primepowers product savefile for this modulus and B1 = 17000000. Last fiddled with by kriesel on 20220224 at 10:26 
20220226, 14:46  #26 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
1E25_{16} Posts 
Timings are somewhat improved and 10kiter residue matches compared to previous start.
Code:
[20220224 06:33:11] M3321928307 S1 bit = 9000 [ 0.04% complete] clocks = 00:12:18.347 [738.3472 msec/iter] Res64: 98E836A8D8A4A1B2. AvgMaxErr = 0.143778152. MaxErr = 0.171875000. Residue shift count = 0. [20220224 06:45:40] M3321928307 S1 bit = 10000 [ 0.04% complete] clocks = 00:12:17.187 [737.1878 msec/iter] Res64: EB3C4D3B62864647. AvgMaxErr = 0.143910080. MaxErr = 0.187500000. Residue shift count = 0. Code:
./Mlucas cpu 16:30:2 Last fiddled with by kriesel on 20220226 at 15:13 
20220303, 21:42  #27 
"James Heinrich"
May 2004
exNorthern Ontario
3^{3}·157 Posts 

20220303, 23:18  #28 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
Ah, there it is after shiftreload of https://www.mersenne.ca/obd. I made the mistake of looking for the general case in the popup menu at upper right of https://www.mersenne.ca/ first. Thank you. You do so much, I hesitated to ask for more!

20220307, 15:12  #29 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
1111000100101_{2} Posts 
OBD Factoring status update
Current TF & P1 status is shown at https://www.mersenne.ca/obd. Current indicated Level is 22.19. Passing Level 23 is expected in ~ 2 more weeks.
3321928171 TF completed to the full 92 bits, 20220205 by mersenne.ca user johnny_jack, now available for P1 reservation by any user with qualified hardware 3321928307 TF completed to 92 bits, 20220223 by kriesel; reserved for P1, stage 1 ~5% complete 3321928319 TF completed to 92 bits, 20220226 by kriesel; priority reservation period runs through 20220326 3321938373 & 3321938381 completed to 90 bits, available for reservation to higher TF level There are 15 others in the exponent range up to 3321939987, in progress at bit levels 8788 to 8990 by kriesel, and 1 to 90 bits by johnny_jack, as part of an effort to go expeditiously to OBD Level 24 or higher, with ~30 exponents remaining with no known factors after TF and P1 factoring completion to recommended levels and bounds, for eventual PRP/GEC/proof & cert when hardware and software development advance sufficiently. Anyone with a sufficiently fast GPU is welcome to help reach OBD level 24 or higher. At the moment: OBD TF completed to 92 bits, reserved for P1 and in progress in P1 stage 1: 1 OBD TF completed to 92 bits, ready for reservation by that user: 1 OBD TF completed to 92 bits, ready for reservation by anyone with qualified hardware for P1: 1 OBD TF completed to 91 bits, reserved to 92 bits: 0 OBD TF completed to 91 bits, available for reservation to 92 bits: 0 Systems with qualification(s) completed & posted for OBD P1: 3 (1 is unconditionally) Exponents completed thru stage 1 P1: 0 Exponents completed thru stage 2 P1: 0 (This status summary is specific to OBD Mersennes. See also Ernst Mayer's F33 P1 effort, mentioned in the Xeon Phi hardware thread.) Last fiddled with by kriesel on 20220307 at 15:13 
20220407, 17:57  #30 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
Current TF & P1 status is shown at https://www.mersenne.ca/obd. Current indicated Level is 23.08.
3321928171 TF completed to the full 92 bits, 20220205 by mersenne.ca user johnny_jack, now available for P1 reservation by any user with qualified hardware 3321928307 TF completed to 92 bits, 20220223 by kriesel; reserved for P1, stage 1 ~20% complete 3321928319 TF completed to 92 bits, 20220226 by kriesel; reserved for P1, stage 1 ~17% completed on a nonECC ram system, will be redone from start on ECC ram 5 others completed to 90 bits, available for reservation to higher TF level There are 12 others in the exponent range up to 3321939987, in progress at bit levels 8788 to 8990 by kriesel, and 1 to 90 bits by johnny_jack, as part of an effort to go expeditiously to OBD Level 24 or higher, with ~30 exponents remaining with no known factors after TF and P1 factoring completion to recommended levels and bounds, for eventual PRP/GEC/proof & cert when hardware and software development advance sufficiently. Anyone with a sufficiently fast GPU is welcome to help reach OBD level 24 or higher. At the moment: OBD TF completed to 92 bits, reserved for P1 and in progress in P1 stage 1: 1 OBD TF completed to 92 bits, reserved for P1, waiting currently for ECC ram system availability OBD TF completed to 92 bits, ready for reservation by anyone with qualified hardware for P1: 1 OBD TF completed to 91 bits, reserved to 92 bits: 0 OBD TF completed to 91 bits, available for reservation to 92 bits: 0 Systems with qualification(s) completed & posted for OBD P1: 3 (1 is unconditionally) Exponents completed thru stage 1 P1: 0 Exponents completed thru stage 2 P1: 0 (This status summary is specific to OBD Mersennes. See also Ernst Mayer's F33 P1 effort, mentioned in the Xeon Phi hardware thread.) Last fiddled with by kriesel on 20220407 at 17:57 
20220512, 07:58  #31 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
Current TF & P1 status is shown at https://www.mersenne.ca/obd. Current indicated Level is 23.12.
3321928171 TF completed to the full 92 bits, 20220205 by mersenne.ca user johnny_jack, now available for P1 reservation by any user with qualified hardware 3321928307 TF completed to 92 bits, 20220223 by kriesel; reserved for P1, stage 1 ~35% complete 3321928319 TF completed to 92 bits, 20220226 by kriesel; reserved for P1, stage 1 ~5% completed on an ECC ram system 7 others completed to 90 bits, available for reservation to higher TF level There are 12 others in the exponent range up to 3321939987, in progress at bit levels 8889 to 8990 by kriesel, as part of an effort to go expeditiously to OBD Level 24 or higher, with ~30 exponents remaining with no known factors after TF and P1 factoring completion to recommended levels and bounds, for eventual PRP/GEC/proof & cert when hardware and software development advance sufficiently. Anyone with a sufficiently fast GPU is welcome to help reach OBD level 24 or higher. At the moment: OBD TF completed to 92 bits, reserved for P1 and in progress in P1 stage 1: 2 OBD TF completed to 92 bits, ready for reservation by anyone with qualified hardware for P1: 1 OBD TF completed to 91 bits, reserved to 92 bits: 0 OBD TF completed to 91 bits, available for reservation to 92 bits: 0 Systems with qualification(s) completed & posted for OBD P1: 3 (1 is unconditionally) Exponents completed thru stage 1 P1: 0 Exponents completed thru stage 2 P1: 0 (This status summary is specific to OBD Mersennes. See also Ernst Mayer's F33 P1 effort, mentioned in the Xeon Phi hardware thread.)[/QUOTE] 
20220726, 15:29  #32 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
Current TF & P1 status is shown at https://www.mersenne.ca/obd. Current indicated Level is 24.03.
3321928171 TF completed to the full 92 bits, 20220205 by mersenne.ca user johnny_jack, now available for P1 reservation by any user with qualified hardware 3321928307 TF completed to 92 bits, 20220223 by kriesel; reserved for P1, stage 1 ~64% completed on an ECC ram system 3321928319 TF completed to 92 bits, 20220226 by kriesel; reserved for P1, stage 1 ~40% completed on an ECC ram system 21 others have been completed to 90 bits, and are available for reservation to a higher TF level. There are 9 others in the exponent range up to 3321939987, in progress at bit levels 8889 to 8990 by kriesel, as part of an effort to go expeditiously to OBD Level 24 or somewhat higher, with ~30 exponents eventually remaining with no known factors after TF and P1 factoring completion to recommended levels and bounds, for eventual PRP/GEC/proof & CERT when hardware and software development advance sufficiently. Anyone with a sufficiently fast GPU, or fast CPU with at least 128 GiB ram, is welcome to help with TF or P1 respectively. At the moment: OBD TF completed to 92 bits, reserved for P1 and in progress in P1 stage 1: 2 OBD TF completed to 92 bits, ready for reservation by anyone with qualified hardware for P1: 1 OBD TF completed to 91 bits, reserved to 92 bits: 0 OBD TF completed to 91 bits, available for reservation to 92 bits: 0 Systems with qualification(s) completed & posted for OBD P1: 3 (1 is unconditionally) Exponents completed thru stage 1 P1: 0 Exponents completed thru stage 2 P1: 0 (This status summary is specific to OBD Mersennes. See also Ernst Mayer's F33 P1 effort, mentioned in the Xeon Phi hardware thread.) Last fiddled with by kriesel on 20220726 at 15:31 
20221110, 18:24  #33 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
7,717 Posts 
Current TF & P1 status is shown at https://www.mersenne.ca/obd. Current indicated Level is 24.04.
3321928171 TF completed to 92 bits, 20220205 by mersenne.ca user johnny_jack, 50% complete stage 1 P1 3321928307 TF completed to 92 bits, 20220223 by kriesel; reserved for P1, stage 1 ~95% completed on an ECC ram system 3321928319 TF completed to 92 bits, 20220226 by kriesel; reserved for P1, stage 1 ~94% completed on an ECC ram system 3321928373 is in progress from 90 to 91 bits TF ~54% complete, reserved by kriesel 27 others have been completed to 90 bits, and are available for reservation to a higher TF level. There are 2 others in the exponent range up to 3321929987, in progress at bit level 8990 by kriesel, as part of an effort to go expeditiously to OBD Level 24 or somewhat higher, with ~30 exponents eventually remaining with no known factors after TF and P1 factoring completion to recommended levels and bounds, for eventual PRP/GEC/proof & CERT when hardware and software development advance sufficiently. Anyone with a sufficiently fast GPU, or fast CPU with at least 64 GiB ram, is welcome to help with TF or P1 respectively. At the moment: OBD TF completed to 92 bits, reserved for P1 and in progress in P1 stage 1: 3 OBD TF completed to 92 bits, ready for reservation by anyone with qualified hardware for P1: 0 OBD TF completed to 91 bits, reserved to 92 bits: 0 OBD TF completed to 91 bits, available for reservation to 92 bits: 0 OBD TF completed to 90 bits, and in progress to 91 bits: 1 Systems with qualification(s) completed & posted for OBD P1: 3 (1 is unconditionally) Exponents completed thru stage 1 P1: 0 Exponents completed thru stage 2 P1: 0 (This status summary is specific to OBD Mersennes. See also Ernst Mayer's F33 P1 effort, mentioned in the Xeon Phi hardware thread.) Last fiddled with by kriesel on 20221110 at 18:31 
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