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Old 2018-09-09, 02:09   #34
NookieN's Avatar
Aug 2002

3A16 Posts

The CPUs aren't generally "changeable" in an end-user system. If they were they would run the risk of becoming unusable after a failed or faulty update. CPU makers like to push that risk to some other part of the system. So at power-up it's always in the same state. The microcode lives in ROM and RAM near the IF/ID stages. It can be updated at boot from EFI/BIOS and/or by the OS. A few Xeon variants do come with an accessory FPGA, but it doesn't affect the CPU internals.

Perhaps bringing this back to the original subject of this thread, the microcode implementation likely has a big influence on AVX512 performance. Did the questions around random-read performance get sufficiently answered experimentally? If not, want questions would you want to ask someone at Intel about memory access in combination with AVX512?
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Old 2018-09-11, 20:29   #35
Mark Rose
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Jan 2013

29·101 Posts

Originally Posted by xx005fs View Post
Thanks for the energy calculation. But my bad for putting 65W for cpu as that's pretty rare when you consider the SoC power and other stuff, I think a more reasonable system power draw would be around at least 90W. So AMD GPU might have better efficiency than CPU and I would honestly prefer the higher power draw on GPUs because they get PRP tests done way faster than consumer CPU.
I'm about to re-activate my 4-core i5 cluster that's been down since I moved. I found that a slight underclock and undervolt got me to 62.5 watts per system at the wall (the cluster now has GPUs and separate power supplies, too, so that's no longer true).
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