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Old 2021-07-16, 13:19   #1
M344587487
 
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Default Steamdeck (Zen 2 quad core, RDNA2 APU)

https://www.steamdeck.com/en/tech


Handheld PC running Arch-derived SteamOS or you can install something else:
  • Zen 2 4C8T
  • 8CU RDNA2 iGPU
  • 15W TDP
  • 16 GB LPDDR5 RAM (5500 MT/s)

An amusing purchase for GIMPS, but it's actually a reasonable price for the spec (albeit the cheap option has some heavy cost-cutting measures like eMMC instead of NVMe) especially considering the RAM speed. An equivalent mini PC would currently cost more than this and that's without screen/battery and with slower RAM. A dock with a peltier cooler would make for an even funnier set up. A rack-mount peltier cooler would be full clown fiesta, I kind of want one just to do it.
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Old 2021-07-18, 22:40   #2
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Was just estimating its gaming performance elsewhere. Let's just say I think people will have to be careful to balance expectations according to the hardware and not fall for hype.

On compute, how does LPDDR5 work? The official site for the device says it is dual channel, but desktop DDR5 will be two channels per module with each channel half the width of DDR4 channels. I'm also aware LPDDR4 was not the same as DDR4, so, be careful there. In a quick look it seems that LPDDR5 might only go up to 32 bit (compared to conventional DDR4 64-bit), so it might only be equivalent bandwidth to a DDR4-dual channel-like 2750. Please check in case I'm getting this mixed up. If it is indeed 5500 at 64 bit wide each for two channels, that would be sweet.

Last fiddled with by mackerel on 2021-07-18 at 22:49 Reason: clarify detail
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Old 2021-07-19, 10:55   #3
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It's possible that the LPDDR5 used has less bandwidth than dual channel DDR4 but that wouldn't make sense for the design, unless the compression used in RDNA2 is such a game changer for game data that it does make sense (unlikely IMO). An LPDDR4/X device can have higher bandwidth than dual channel DDR4 so it must be possible for LPDDR5 too. Scaling up from theoretical DDR4 3200 we get an ~88GB/s estimate for LPDDR5 5500, scaling up from benchmarked ( https://www.starcoder.com/wordpress/...-in-apples-m1/ ) LPDDR4-4266 we get ~77GB/s. That is the sort of ballpark you'd need minimum to make a gaming device work, the 50GB/s of dual DDR4 3200 I use paired with (no/low compression) Vega iGPU is fine for casual gaming but really doesn't cut it for the more demanding AAA.

My poor grasp of LPDDR4 is that it uses smaller/slower buses but more of them to make up the difference, according to wikipedia LPDDR4 can run up to quad channel. So when I see LPDDR4 4267 with higher bandwidth than DDR4 3200 dual channel, I'm imaging the former is roughly equivalent to quad DDR4 2133 (however inaccurate that is for a number of metrics, it seems to bear out with bandwidth).

If bandwidth is poor then it's dead in the water for us and probably for gaming too.
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Old 2021-07-20, 10:25   #4
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Valve have updated the Steamdeck specs on the page to clarify that the RAM is:
Quote:
16 GB LPDDR5 on-board RAM (5500 MT/s quad 32-bit channels)
, which is a theoretical ~88GB/s bandwidth.



The data rate numbers can reasonably be compared between LP and non-LP directly when the LP has double the channels as the LP channels have half the width. I doubt the better granularity is too useful unless there's an unoptimised program out there that works with smaller types, if LP even has better granularity in practice.


I believe DDR5 has ECC by default, LPDDR5 may do too although it may be optional as per this press release (what they refer to may be a secondary optional ECC): https://www.jedec.org/news/pressrele...devices-lpddr5


Unhelpfully the spec is paywalled and I can't find a free draft copy or otherwise.
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Old 2021-07-21, 08:24   #5
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That is looking a lot better, and puts the peak bandwidth closer to that of entry level discrete GPUs. e.g. RX 560 and GTX 1050 are both rated at 112 GB/s.

On the DDR5 ECC thing it has been a point of confusion on desktop too. The short version is that DDR5 includes ECC at the chip level, in a way that can be seen as similar to how flash SSDs can work around occasional imperfections and increasing yield. We're moving past the era when all bits have to work correctly as we push into higher densities and higher speeds. ECC makes up that slack.

What the link describes is link level ECC, so between ram and whatever it is talking to. That remains an optional extra, and probably will only be used in scenarios where it is already used today.
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Old 2021-07-21, 09:16   #6
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If the ECC is only on-chip would that allow pushing the overclocking of some of the memory timings more than the bandwidth?
Hopefully, this ECC is applied to the current weak links and will help.
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