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Old 2020-12-04, 16:00   #1
Xyzzy
 
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Default Rocket Lake speculation?

https://videocardz.com/newz/msi-mist...specificaitons
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A quick glance over the CPU-Z screenshot reveals that the Rocket Lake-S engineering sample supports AVX512F and SHA instructions, which the 10th Gen Core Comet Lake-S series do not support.
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Old 2020-12-04, 16:35   #2
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Time for a Rocket Lake speculation thread? I'd caution that if the implementation is single unit, the throughput may be no better than AVX2.
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Old 2020-12-05, 05:17   #3
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Time for a Rocket Lake speculation thread? I'd caution that if the implementation is single unit, the throughput may be no better than AVX2.
Should be more efficient with memory bandwidth though, no?
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Old 2020-12-05, 10:50   #4
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Should be more efficient with memory bandwidth though, no?
Maybe within the execution core area itself, but I'd think the actual execution capability and effective ram bandwidth will remain the main limiting factors, and there it doesn't look that different from previous CPUs.


While here, another "leak":
https://twitter.com/TUM_APISAK/statu...69804330860544
Shows model name of i9-11900k, assuming reported clock of 3.5GHz is base, this is 100MHz higher than the unnamed ES sample from MSI leak, although the leak sample may be some lower model also e.g. non-k.

Based on leaks so far, my prediction is it will have worse power/clock, but better perf/clock and perf/power due to higher (general) IPC. I don't know if Prime95 type work will see the IPC benefits more general workloads will.
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Old 2020-12-05, 11:47   #5
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Supporting 3200 speed RAM and PCIe4 is a nice step, Xe graphics are good, AV1 decode makes it a decent option for a long life consumer part as the upcoming transition to AV1 video won't make it seem clunky before its time. Spending transistors on the very niche AVX512 seems to be the exact wrong move, to compete longterm they should be focusing on slimming down and making a very efficient core IMO, I guess that's being worked on behind closed doors in tandem with a viable efficient process.

8 cores with AVX512 and such a low amount of cache is getting ridiculous, if they continue with this sort of design they should really be looking at triple channel going forward. I hope that intel does that when they finally shake off the dust and bring their a-game again, DDR5 gains will be nice but bumping up the channel count is what's really needed to accelerate progress.
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Old 2020-12-05, 12:38   #6
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Rocket Lake seems to be highly inspired by Ice Lake, and to my understanding the AVX512 implementation is not going to be silicon hogging since it does not offer additional FP64 execution resource over AVX2 assuming it will be a single unit implementation. So any performance considerations on that side I'd expect to be no worse than existing mainstream Intel CPUs. Adding AVX512 in any form is the right move for Intel if they want it to come out of niche status.

The next Intel desktop CPU will be Alder Lake. I'm not aware of what will be going into that, but I'd guess DDR5 which in itself should help a lot. Probably still single unit AVX-512 though. Caches will probably expand as already seen in Tiger Lake. Like many around here I'd love more channels, but I think we'll still have to wait for some HEDT offering to cover that. I think that could be a possible point of attack for Intel if they can bring down the platform cost of HEDT especially to offer 12-16 core count area where AMD are limited constrained consumer platform.

As for slimming down cores, that's just NOT the direction Intel or AMD are heading in. Cramming in more resource into a core is what both sides are doing. Single thread still seems an important enough metric for them to chase. I've speculate in future if "more cores" really takes off, then going simpler cores will make more sense at that point. We're still a long way off that point.

Actually, with Alder Lake, the simple cores will be covered by the "small" cores in that hybrid approach. Still yet to see what value that would add in a desktop though, it can make some sense in a laptop.
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Old 2020-12-05, 15:28   #7
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Rocket Lake seems to be highly inspired by Ice Lake, and to my understanding the AVX512 implementation is not going to be silicon hogging since it does not offer additional FP64 execution resource over AVX2 assuming it will be a single unit implementation. So any performance considerations on that side I'd expect to be no worse than existing mainstream Intel CPUs. Adding AVX512 in any form is the right move for Intel if they want it to come out of niche status.
They may want that but is it the right move? AVX512 adds a lot of instructions beyond the natural widening of AVX2, most of which seem incredibly niche. More technical debt to tether yourself to. In contrast other recent additions like crypto and virtualisation make a lot of sense as they're widely applicable. Even the widening to 512 bits doesn't make immediate sense if the backing units aren't being improved to accelerate them properly.

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Like many around here I'd love more channels, but I think we'll still have to wait for some HEDT offering to cover that. I think that could be a possible point of attack for Intel if they can bring down the platform cost of HEDT especially to offer 12-16 core count area where AMD are limited constrained consumer platform.
It would be an amusing turn of events if AMD did triple channel for consumers, allowing the consumer 12-16 core parts to act as their low end HEDT offering. There would be a point besides that to go triple channel for the consumer line, it's an easy way to make more powerful iGPU's viable as they eat as much bandwidth as can be thrown at them. Until intel goes MCM AMD are probably the only one with triple channel as an option. I don't think they will actually do it either but it seems like a logical way to stay ahead.

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Originally Posted by mackerel View Post
As for slimming down cores, that's just NOT the direction Intel or AMD are heading in. Cramming in more resource into a core is what both sides are doing. Single thread still seems an important enough metric for them to chase. I've speculate in future if "more cores" really takes off, then going simpler cores will make more sense at that point. We're still a long way off that point.
I mainly meant power efficiency really, literal years of competition have gone by and they've only recently started showing progress in that area with Tiger Lake, and only scaling to quad core. I'm not expecting miracles on 14nm but taking the edge off power consumption for the same performance would be a start.

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Actually, with Alder Lake, the simple cores will be covered by the "small" cores in that hybrid approach. Still yet to see what value that would add in a desktop though, it can make some sense in a laptop.
big.LITTLE is a way to try and have your cake and eat it, low power when needed high performance when needed, but I'm sceptical that it's a winning formula for anything other than laptops. At best it lets background tasks get out of the way, which is of limited appeal to pure compute.
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Old 2021-03-22, 11:49   #8
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While looking for a new mic at an online store by chance I saw they had Rocket Lake listed as in stock, so I should have a 11700k tomorrow. I didn't get the mic.

Obviously for the audience here the biggest question will be what its AVX performance will be like. In Anandtech's pre-release testing they did show gains in single thread y-cruncher, with the multi-thread result presumably being memory bound as it was much the same as everything else in that space.

Since I'm more of an LLR user at relatively smaller FFTs, it remains to be seen if there will be gains in that area. I do have a Skylake-X I can compare against. I do recall there might have been software performance regression running AVX-512 on "one unit" Xeons, but have no idea if that is still a thing. So it could still go down, up or not be changed much at all.

If someone can let me know what are the current bigger FFT sizes of interest are, I can also run those when I get it.
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Old 2021-03-22, 14:11   #9
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I'd expect every instruction set to bottleneck by memory bandwidth to roughly the same throughput, assuming that's true a test comparing power consumption and clocks when using SSE4.2/AVX2/AVX512 would be interesting. Early AVX512 had to run with severely limited clocks as you say, AVX2 also had less severe limiting on launch which has been improved every iteration. If AVX512 isn't the clear efficient choice by now intel have really dropped the ball.
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Old 2021-03-22, 16:36   #10
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I'm setting up to do some testing on the outgoing Comet Lake CPU, which I don't expect to be much different from what I saw with Coffee Lake previously. But it will be the same system with same software I will use for Rocket Lake, so that helps removes some variables than trying to re-interpret my older Coffee Lake (and Zen 2) data.

I'm still debating what testing to do, but there are some obvious ones:
1a, does the AVX-512 implementation in Rocket Lake give a significant per-clock performance improvement over Comet Lake for LLR workloads of interest, if so, how much?
1b, At what power consumption? (also, performance per watt)
1c, How does varying power limit affect it? In my limited experience enthusiast mobos tend to be aggressive in AVX clock and don't use power limit. If a limit were applied it doesn't affect clocks much but provides a much more balanced system.

Separate to the above, I also intend to do a microarchitecture IPC comparison, and limited real world gaming performance tests on a few titles.
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Old 2021-03-22, 22:52   #11
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Just got an e-mail saying essentially I wont get it until launch. So I'll cancel that one and re-order at the time as I had intended to get a lower one, not the higher one I saw today. I have more time to do the pre-testing, which is just as well as I didn't manage to get far with it today.
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