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Old 2009-01-15, 15:16   #1
uigrad
 
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Default Phenom 2?

I looked through the other threads here for data about the new AMD processor (Phenom 2), and found nothing. Newegg just started selling them last Friday for $275, and they use the standard AM2 socket:
http://www.newegg.com/Product/Produc...82E16819103471

They are quad-core, and run at 3.0GHz (before overclocking). Tom's hardware review is here:
http://www.tomshardware.com/reviews/...-940,2114.html

Quote:
A comparison between the current top-of-the-line AMD Phenom II X4 940 and the Intel Core i7 shows the Intel processor coming out about 22% faster. On the other hand, in comparison with the Intel Core 2 Quad Q6600, the same Phenom II CPU finishes about 10% ahead.
So, it looks like it's only advantages over an i7 would be price and energy efficiency. I'm just curious if anyone has tried it with mprime, or if AMD even matters any more.
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Old 2009-01-16, 00:53   #2
Kevin
 
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Where does it say that the Phenom II is more energy efficient than the i7? It just says that the Phenom II is a great improvement over the original Phenom, but there was also a giant gap between the original Phenom and 45nm Core 2 in that department.
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Old 2009-01-16, 01:56   #3
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Quote:
Originally Posted by Kevin View Post
Where does it say that the Phenom II is more energy efficient than the i7?
Go to page 8, second figure ("System-Level Power Consumption At 100% Load", "Power Consumption of System - Load") or page 7, second figure ("Power Consumption of System - Idle") of the Tom's Hardware review.

Last fiddled with by cheesehead on 2009-01-16 at 01:57
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Old 2009-01-16, 11:31   #4
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Quote:
Originally Posted by cheesehead View Post
Go to page 8, second figure ("System-Level Power Consumption At 100% Load", "Power Consumption of System - Load") or page 7, second figure ("Power Consumption of System - Idle") of the Tom's Hardware review.
I've read that the Phenom 2 still doesn't get the performance of a Intel i7. The i7 still will be the better choice.
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Old 2009-01-16, 17:06   #5
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Quote:
Originally Posted by joblack View Post
I've read that the Phenom 2 still doesn't get the performance of a Intel i7. The i7 still will be the better choice.

However, it is cheaper, and there are some of us that are loyal to our chip manufacturers. I've always chosen AMD over Intel (since the K6-2), and suffered extreme turmoil when I bought my last processor (gave in and bought a Q6600, my first Intel since 1997).

I am of course joking about the "extreme turmoil", but I did have a couple of friends who know me well and questioned me harshly about it. I'm glad that AMD isn't completely out yet, but I really wonder how much longer they can hang on.

Regardless of loyalties, I am still curious about how it preforms with mprime (or prime95), since none of the reviews out there have used mprime for benchmarking.

EDIT: right after posting, I came across an article by Tomshardware, showing that they have successfully overclocked their Phenom II to 4.957 Ghz: http://www.tomshardware.com/news/tom...m-II,6702.html
They say that test results are coming. I think this looks very promising

Last fiddled with by uigrad on 2009-01-16 at 17:13
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Old 2009-01-16, 18:10   #6
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I bought my Phenom for exactly one reason: Instruction Based Sampling. Afaik Intel cpus don't have anything comparable. Instead of writing a sample whenever some interesting event happens as in Event Based Sampling, IBS records everything that happens to one in every n macro-ops. EBS is great for stuff that happens infrequently, but due to out-of-order execution, it cannot write the exact IP address of the instruction that triggered the event. IBS is nice for stuff that happens often, and where you need to know the exact instruction that caused it. E.g. if you have a couple of conditional branches side-by-side, EBS is nearly useless in determining which ones get mispredicted - IBS shines here. I've played with it only a little so far, but it's quite fun to see what's going on in the cpu (cache misses, cache bank conflicts, total time a macro-op spent in pipleline, etc) with down-to-the-exact-instruction accuracy. I hope eventually I'll get a bit more speed out of the mulredc code in GMP-ECM that way, among other things.

Alex

Last fiddled with by akruppa on 2009-01-17 at 11:47
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Old 2009-01-16, 19:20   #7
henryzz
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Quote:
Originally Posted by akruppa View Post
I bought my Phenom for exactly one reason: Instruction Based Sampling. Afaik Intel cpus don't have anything comparable. Instead of writing a sample whenever some interesting event happens as in Event Based Sampling, IBS records everything that happens to one in every n macro-ops. EBS is great for stuff that happens infrequently, but due to out-of-order execution, it cannot write the exact IP address of the instruction that triggered the event. IBS is nice for stuff that happens often, and where you need to know the exact instruction that caused it. I.e. if you have a couple of conditional branches side-by-side, EBS is nearly useless in determining which ones get mispredicted - IBS shines here. I've played with it only a little so far, but it's quite fun to see what's going on in the cpu (cache misses, cache bank conflicts, total time a macro-op spent in pipleline, etc) with down-to-the-exact-instruction accuracy. I hope eventually I'll get a bit more speed out of the mulredc code in GMP-ECM that way, among other things.

Alex
sounds like it is good for assembly development then
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Old 2009-01-16, 19:28   #8
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Quote:
Originally Posted by akruppa View Post
I bought my Phenom for exactly one reason: Instruction Based Sampling.
That looks like a very interesting feature! But didn't you forget to say that AMD architecture also still is better for integer-based multi-precision computations?
I wonder if Intel did improve that situation on their i7...

Last fiddled with by ldesnogu on 2009-01-16 at 19:28
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Old 2009-01-16, 20:45   #9
akruppa
 
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The Athlon64/Opteron can issue one MUL every 2 clock cycles, with latency 4 for the low word of the product, and latency 5 for the high word. I think it's the same for the Phenom, but I need to check. On Core 2, you can issue only 1 MUL every 4 clock cycles, so if you have some independent multiplications, the AMD cpu will do a lot better. Currently the mulredc code in GMP-ECM doesn't show the difference since each block of 2 independent muls seems to take 8 cycles on both cpus. On Core 2 it's the best we'll ever get, but on AMD there should be an improvement possible - I think 6 cycles without unreasonable effort. Torjbörn mentioned that with a really clever loop, <6 cycles might be possible.

Alex

Last fiddled with by akruppa on 2009-01-16 at 23:37 Reason: corrected Torbörn's estimate
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Old 2009-01-17, 09:51   #10
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Quote:
Originally Posted by akruppa View Post
I bought my Phenom for exactly one reason: Instruction Based Sampling. Afaik Intel cpus don't have anything comparable. Instead of writing a sample whenever some interesting event happens as in Event Based Sampling, IBS records everything that happens to one in every n macro-ops. EBS is great for stuff that happens infrequently, but due to out-of-order execution, it cannot write the exact IP address of the instruction that triggered the event. IBS is nice for stuff that happens often, and where you need to know the exact instruction that caused it. I.e. if you have a couple of conditional branches side-by-side, EBS is nearly useless in determining which ones get mispredicted - IBS shines here. I've played with it only a little so far, but it's quite fun to see what's going on in the cpu (cache misses, cache bank conflicts, total time a macro-op spent in pipleline, etc) with down-to-the-exact-instruction accuracy. I hope eventually I'll get a bit more speed out of the mulredc code in GMP-ECM that way, among other things.

Alex
"Intel has it,too:

Pfmon provides access to ALL the Intel Core-based PMU specific features, implemented by Core 2 processors. Note that Intel Core Duo/Solo use another PMU model.
The following features are supported:
  • 5 counters (3 fixed counters, 2 generic counters)
  • Event counter mask
  • Event inverse mask
  • Event edge mask
  • Previse Event-Based Sampling (PEBS)"

----

That only brings advantages if you compile your own software. You can't optimize existing software and I doubt that Mr. Prime95 will hand optimize for Phenom2 only ;).

Last fiddled with by joblack on 2009-01-17 at 09:53
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Old 2009-01-17, 11:03   #11
ldesnogu
 
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Quote:
Originally Posted by joblack View Post
"Intel has it,too:

Pfmon provides access to ALL the Intel Core-based PMU specific features, implemented by Core 2 processors. Note that Intel Core Duo/Solo use another PMU model.
The following features are supported:
  • 5 counters (3 fixed counters, 2 generic counters)
  • Event counter mask
  • Event inverse mask
  • Event edge mask
  • Previse Event-Based Sampling (PEBS)"

----

That only brings advantages if you compile your own software. You can't optimize existing software and I doubt that Mr. Prime95 will hand optimize for Phenom2 only ;).
This is standard performance counting (that all processors have been using for many years) and is different from what akruppa described.
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