Thread: Intel Xeon PHI?
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Old 2020-12-02, 03:38   #145
ewmayer's Avatar
Sep 2002
República de California

7·11·151 Posts

Originally Posted by kriesel View Post It's not just on the board, it's in the same package as the processor cores. Like modern caches.
Yes, I took 'onboard' to mean in the CPU package proper, because for it to be used to imply 'on the (mother)board' would be inane - as opposed to 'onshore'? - but apparently the mobo manual's usage means just that. AFAICT the MCDRAM frequency is not fiddlable, unless it's somehow tied to the CPU frequency. Anyhow, found this doc from Colfax Research - the folks who made the GIMPS KNL workstation model - re. the 3 usage modes (I've added numbering for clarity):
Advantages and disadvantages of the three modes are:

[1] Cache mode — No work required to use, but may have lower performance than flat mode in case of frequent misses in HBM as cache.
[2] Flat mode — May offer better performance than cache mode, but requires modifications of the code and/or execution environment.
[3] Hybrid mode — Benefit of both Flat mode and Cache mode, but smaller sizes for each.
Since I have 0 RAM aside from the MCDRAM, HBM-as-cache misses are not in play, thus choosing any usage mode other than [1] would be silly: if 0 cache misses in mode [1], then [2] offers no performance benefit and requires both the prorietary Intel toolchain and major recode, and [3] offers the worst of both worlds: smaller L3 cache than 16GB, and needing recode.

Last fiddled with by ewmayer on 2020-12-02 at 03:40
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