mersenneforum.org - [Mission Accomplished] Let's finish primality verification through Mp#48*, M(57 885 161)

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and M57747401 likely to complete within a day.
[QUOTE=firejuggler;588579]before the new year, and i'll be happy.[/QUOTE]Get ready to celebrate.

This is what we have at the moment:

[ATTACH]25749[/ATTACH]

[M]57747401[/M] done, lowest remaining unchanged. A fine example of how lowest remaining does not always reflect progress well, sometimes not at all. Smallest remaining delta just jumped from 32 to 340.

12 DC to finish, and a cert. Certs typically complete within a day. One DC is a bit overdue for expiration and reassignment. The other 11 DC are all recently reassigned to Cat0-qualified fast reliable systems, reporting in recently.
Estimated completions for those range from today 2021-09-25 to 2021-10-01. Average indicated ETA is ~3 days (2021-09-28) The laggard for expiration and reissue likely expires and reissues today and completes by ~2021-10-03.

12 (11 DC 1 cert) remain; 57760333 completed; smallest remaining delta 582, average 12905.

10 DC and 1 lingering CERT remain; [M]57760673[/M] completed.

Only 8 left now. How often are triple-checks required?

That changed quickly. Lingering cert cleared, and 2 LL DC. MP#48* loses the * projected ~2021-10-01 by alternate method.
Extrapolating a linear fit through the various projections from M56 history gives a solution for convergence (date of projection, matching date projected) as 2021-09-30 02:45 UTC.

[QUOTE=masser;588740]How often are triple-checks required?[/QUOTE]I don't recall there being any seen in previous final going to milestones. Cat0 qualified systems are pre-screened to be fast and reliable for the previous 120 days. The strategic double and triple check thread sweeps the TC needs out of the way earlier. Overall, TC rate is ~2-4% per exponent, 1-2% per LL test. (Much higher if there's an error code recorded.) It varies depending on exponent size, system speed, whether the system has ECC ram, and whether it runs software with Jacobi check included. All 8 now remaining have nonzero shift count first LL tests with no error codes indicated. Chance of a TC being needed somewhere in the last 8 is slim but nonzero, ~12% chance or less of one TC, <2% of 2 or more. If whoever got a hypothetical TC had a Radeon VII they could move it and complete it in 7 hours.

[M]57797893[/M] completed.

Probably two more clear in the next day; all by ~2021-10-02. Average delta 25811.

Two more will complete soon. All are progressing.