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-   -   mtsieve enhancements (https://www.mersenneforum.org/showthread.php?t=25486)

ET_ 2020-12-27 21:20

Any hope to have either gfndsieve or dmdsieve on an ARM-64 platform, either with an ASM translation or with plain c routines?

Just asking for a friend of mine... :rolleyes::innocent::et_:

rogue 2020-12-27 23:10

[QUOTE=ET_;567484]Any hope to have either gfndsieve or dmdsieve on an ARM-64 platform, either with an ASM translation or with plain c routines?

Just asking for a friend of mine... :rolleyes::innocent::et_:[/QUOTE]

It might be possible, but I have no way to compile or test such code. I'm hoping that my wife will let me get an Apple laptop with the M1 CPU next year, but don't have a lot of hope for that. I believe that someone posted some ARM ASM FPU routines earlier in this thread. Someone with access to an ARM CPU could make the changes and do some testing. Fortunately gfndsieve and dmdsieve should be easy to get working if one has the necessary ARM functions. Until then I will look at producing versions that do not require ASM.

pepi37 2020-12-27 23:18

Where srsieve2 store legendre table file?


I use this command but after I stop srsieve2 I cannot find any new file



srsieve2.exe -l -L legendre .txt -P 176362230330 .....

rogue 2020-12-28 01:08

[QUOTE=pepi37;567496]Where srsieve2 store legendre table file?

I use this command but after I stop srsieve2 I cannot find any new file

srsieve2.exe -l -L legendre .txt -P 176362230330 .....[/QUOTE]

That code is not implemented yet. It is not a small task. I started a while ago, but have a ways to go. You can continue to use sr1sieve/sr2sieve for now.

Happy5214 2020-12-28 04:56

1 Attachment(s)
[QUOTE=ET_;567484]Any hope to have either gfndsieve or dmdsieve on an ARM-64 platform, either with an ASM translation or with plain c routines?

Just asking for a friend of mine... :rolleyes::innocent::et_:[/QUOTE]

[QUOTE=rogue;567495]It might be possible, but I have no way to compile or test such code. I'm hoping that my wife will let me get an Apple laptop with the M1 CPU next year, but don't have a lot of hope for that. I believe that someone posted some ARM ASM FPU routines earlier in this thread. Someone with access to an ARM CPU could make the changes and do some testing. Fortunately gfndsieve and dmdsieve should be easy to get working if one has the necessary ARM functions. Until then I will look at producing versions that do not require ASM.[/QUOTE]

That would be me and my ODROID-C4, though I apparently forgot to post a tarball of the entire set of translated ASM files (attached here). I haven't done any actual integration work with the mtsieve code yet, though I do have sample programs that check out. Looking at the two sieves in question, they appear to utilize the untranslated asm-ext routines in the App class (I only translated the x87 routines), so that would have to be dealt with.

As an aside, I briefly experimented with an Advanced SIMD/NEON implementation, but I gave up quickly when I realized that I couldn't vectorize the integer instructions, so all the instructions I thought I'd be saving would still have to be executed in some form.

rogue 2020-12-28 13:25

[QUOTE=Happy5214;567515]That would be me and my ODROID-C4, though I apparently forgot to post a tarball of the entire set of translated ASM files (attached here). I haven't done any actual integration work with the mtsieve code yet, though I do have sample programs that check out. Looking at the two sieves in question, they appear to utilize the untranslated asm-ext routines in the App class (I only translated the x87 routines), so that would have to be dealt with.

As an aside, I briefly experimented with an Advanced SIMD/NEON implementation, but I gave up quickly when I realized that I couldn't vectorize the integer instructions, so all the instructions I thought I'd be saving would still have to be executed in some form.[/QUOTE]

I forgot about those. The easiest thing for now would be to disable -x and associated logic when building on a non-x86 CPU.

rogue 2020-12-28 14:40

There is a bug in this release that affects all exes that was introduced with factor validation. I'll fix it later today.

rogue 2020-12-29 14:29

I have posted 2.1.1 over at sourceforge and removed 2.1.0. Here are the changes:

[code]
2.1.1 - December 29, 2020
framework:
Fixed an infinite loop that occurs with the special CPU worker in GPU builds.

Removed the factor validation logic added in 2.1.0 do to an issue with how I
implemented it.

gcwsieve, gcwsievecl: version 1.5
Added working factor validation logic with -I.
Improved GPU speed by another 10%. Thanks to Yves Gallot for the code.

mfsieve, mfsievecl: version 1.8
Added working factor validation logic with -I.
Fix bug triggering invalid factor in the CPU code when minN is odd with factorials.
[/code]

pepi37 2020-12-30 21:57

Did you increase upper limit in srsieve2?

rogue 2020-12-30 22:20

[QUOTE=pepi37;567775]Did you increase upper limit in srsieve2?[/QUOTE]

Funny that you ask...

I just posted 2.1.2 over at sourceforge.

[code]
2.1.2 - December 30, 2020
framework:
Retain factor counts when workers are rebuilt.

srsieve2: version 1.3
Added factor validation logic when using -I.
Switched to Montgomery mulitplication, which is about 20% faster than the previous
logic. This also gives a 20% speed bump and adds support for p up to 2^62.
[/code]

And I have this on my wish list:

[code]
Added on December 29, 2020
framework:
Add ARM support
[/code]

This is my last release for 2020.

pepi37 2020-12-30 22:23

Great! so let test it!


and first bug found


fbncsieve.exe -P 6000000000000000 -i 1100.txt -o 1100.txt -f N -W6 -O s53factodes.txt
fbncsieve v1.4, a program to find factors of k*b^n+c numbers for fixed b, n, and c and variable k
Sieve started: [COLOR=red][B]347880187459691[/B][/COLOR] < p < 6e15 with 75104 terms (1014 < k < 1999948, k*10^1100000+1) (expecting 5887 factors)
[COLOR=Red][B]p=0[/B][/COLOR], 22.89M p/sec, no factors found


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